Random access memories, or RAMs, have become a basic building block of integrated electronics systems. For many applications, maximization of memory density is extremely important, for example, where power or space constraints are significant. Thus, an ever pressing need exists to increase RAM density.
Theoretically, the density of random access memories could be increased by building layers of memory cells on top of other layers of memory cells to form a three-dimensional (3-D) RAM. However, in conventional integrated circuit processing technology for random access memories, such as that using silicon or gallium arsenide technology, the memory cells consist of transistors which act as switches for current flow to charge-storing capacitors. In fabrication of such transistors, the doping profiles, damage removal, and conducting film deposition are usually performed at high temperatures which result in diffusion of dopants. Thus, the fabrication of a second layer of memory cells over a first layer would irreversibly damage the first layer. Furthermore, a third layer would damage both the first and second layers.
Moreover, the advent of advanced processing systems, such as those based on neural networks, smart memories, or fuzzy logic, has brought about the need to increase the functionality of memory chips. For example, for existing implementations of model neurons, a major unresolved problem is that of achieving a simple integration scheme containing a large number of weighted inputs converging on a single neuron-like element. This problem can be solved in part with random access memories which allow for cross talk between memory locations. Existing RAMs do not provide solutions for this or related problems.
Therefore, a need has arisen for an integrated circuit with increased memory density by allowing for 3-D structures. Furthermore, a need has arisen for an integrated circuit that allows for cross talk between memory locations for applications in advanced processing systems.